Alex Tenca

From 1981 to 1992 he worked as a researcher at USP, developing projects of distributed computer systems, computer network protocols, packet-switching network communication nodes and control systems. In 1989 he joined the faculty group of the Computer Engineering and Digital Systems Department of Escola Politecnica, USP, where he lectured classes in computer networks and computer architecture, until the beginning of his doctoral studies in 1992.

Upon completion of his doctorate he worked as an assistant professor of computer engineering at the Oregon State University, Electrical and Computer Engineering Department until 2004.

Dr. Tenca is currently working for Synopsis Corporation in Portland, Oregon. His research interests include computer architecture, computer networks, computer arithmetic and reconfigurable systems.

Contact Information

Selected Publications

• C. K. Koc and A. F. Tenca. A Scalable Architecture for Montgomery Multiplication. US Patent Application, April 29, 1999.   Abstract
• A. F. Tenca and C. K. Koc. A scalable architecture for Montgomery multiplication. Cryptographic Hardware and Embedded Systems, C. K. Koc and C. Paar, editors, First International Workshop, Worcester, MA, USA, pages 94-108, Springer Verlag, LNCS Nr. 1717, August 12-13, 1999. Abstract   Paper
• C. K. Koc, E. Savas, A. F. Tenca. A Scalable and Unified Multiplier for Finite Fields. US Patent Application, February 29, 2000.   Abstract
• E. Savas, A. F. Tenca, and C. K. Koc. A scalable and unified multiplier architecture for finite fields GF(p) and GF(2^m). Cryptographic Hardware and Embedded Systems - CHES 2000, C. K. Koc and C. Paar, editors, Second International Workshop, Worcester, MA, USA, pages 277-292, Springer Verlag, LNCS Nr. 1965, August 17-18, 2000. Abstract   Paper
• C. K. Koc, A. F. Tenca, and G. Todorov. An High-Radix Scalable Modular Multiplier. US Patent Application, April 25, 2001.   Abstract
• A. F. Tenca, G. Todorov, and C. K. Koc. High-radix design of a scalable modular multiplier. Cryptographic Hardware and Embedded Systems - CHES 2001, C. K. Koc, D. Naccache, and C. Paar, editors, Third International Workshop, Paris, France, pages 185-201, Springer Verlag, LNCS Nr. 2162, May 14-16, 2001. Abstract Paper
• A. A.-A. Gutub, A. F. Tenca, and C. K. Koc. Scalable VLSI architecture for GF(p) Montgomery modular inverse computation. IEEE Computer Society Annual Symposium on VLSI, pages 53--58, Pittsburgh, Pennsylvania, IEEE Computer Society Press, Los Alamitos, California, April 25-26, 2002.   Abstract   Paper
• A. A.-A. Gutub, A. F. Tenca, E. Savas, and C. K. Koc. Scalable and unified hardware to compute Montgomery inverse in GF(p) and GF(2^n). Cryptographic Hardware and Embedded Systems - CHES 2002, B. S. Kaliski Jr., C. K. Koc, and C. Paar, editors, 4th International Workshop, Redwood Shores, CA, USA, pages 484-499, Springer Verlag, LNCS Nr. 2523, August 13-15, 2002.   Abstract   Paper
• A. F. Tenca and C. K. Koc. A scalable architecture for modular multiplication based on Montgomery's algorithm. IEEE Transactions on Computers, 52(9):1215-1221, September 2003.   Abstract   Paper
• E. Savas, A. F. Tenca, and C. K. Koc. Dual-field multiplier architecture for cryptographic applications Thirty-Seventh Asilomar Conference on Signals, Systems, and Computers, pages 374-378, IEEE Press, Pacific Grove, California, November 9-12, 2003.   Abstract   Paper
• E. Savas, A. F. Tenca, M. E. Ciftcibasi, and C. K. Koc. Novel multiplier architectures for GF(p) and GF(2^n). IEE Proceedings - Computers and Digital Techniques, 151(2):147-160, March 2004.   Abstract   Paper
• A. F. Tenca, E. Savas, and C. K. Koc. A design framework for scalable and unified multipliers in GF(p) and GF(2^m). International Journal of Computer Research, 13(1):68-83, 2004.   Abstract   Paper
  This paper is also published in Embedded Cryptographic Hardware: Methodologies and Architectures, N. Nedjah and L. de M. Mourelle, editors, Nova Science Publishers, 2004.
• L. A. Tawalbeh, A. F. Tenca, S. Park, and C. K. Koc. A dual-field modular division algorithm and architecture for application specific hardware. Thirty-Eighth Asilomar Conference on Signals, Systems, and Computers, to appear, IEEE Press, Pacific Grove, California, November 7-10, 2004.   Abstract   Paper
• L. A. Tawalbeh, A. F. Tenca, and C. K. Koc. A radix-4 design of a scalable modular multiplier with recoding techniques. IEEE Potentials, to appear, 2005.   Abstract   Paper